|200M units shipped|
Jacobs Pineda, Inc. specializes in VLSI designs for high volume, cost sensitive, consumer audio applications requiring AC-3, MPEG, DVD, DAC, PLL and 3-D functions. Our flagship product is the J1 Dolby Digital® /AC-3/MPEG Audio Decoding Core Cell design, which is the world's smallest, with a silicon area of only 1.0 sq.mm(0.18u CMOS circa 1998).
Our mission is to give our licensees a definitive advantage over their competition by providing them with the industry's most cost-effective audio VLSI designs. With over 200M units produced to date, our designs are licensed and employed by Fortune 500 semiconductor and system manufacturers of audio products for the consumer and computing markets.
Founded in 1995, Jacobs Pineda, Inc. is a California Corporation
with offices in Oakland, CA.
The J1 is a core cell design for an application-specific signal processor which performs Dolby Digital®, AC-3, and MPEG audio decompression in a single design. The J1 is exceptionally efficient, and requires only 1.0 sqmm of silicon area (based on data from several standard 3LM 0.18u CMOS standard cell libraries and layouts).
The J1 is capable of decoding all Dolby Digital and AC-3 bitstreams with full support for bitstreams encoded with 5.1 channels and data rates of up to 640kb/s. The J1 downmixing capability produces stereo output in either normal or Pro-Logic compatible modes, making it ideal for DVD and set-top applications. For MPEG operation, J1 produces stereo output from either MPEG-1 or MPEG-2 audio bitstreams. It also processes uncompressed PCM inputs to control volume or mix to mono.
The J1 audio quality meets the highest standards, allowing it to be used for the most demanding audio applications. The 20-bit PCM output yields Dolby Group A performance for Dolby Digital/AC-3, and conforms to the highest audio quality level specified by ISO11172-4 for MPEG bitstreams. The J1 Dolby Digital/AC-3 decoding algorithm has undergone testing at Dolby Laboratories and has been qualified for Group A applications.
The J1 silicon implementation has been granted Dolby Digital Certification by Dolby Laboratories for sales to Dolby Laboratories Licencing Corporation Licensees.
The JDA1 is core cell design for a high-performance delta-sigma audio D/A converter (DAC) with an integral Phase Lock Loop (PLL) that can be manufactured using off-the-shelf digital processes with off-the-shelf gate array or standard cell libraries. The JDA1 is exceptionally efficient, and requires only 0.3 - 0.4 sqmm of silicon area (based on data from several standard 3LM 0.18u CMOS standard cell libraries and layouts). Size scales with digital IC technology.
The incorporation of a PLL with the DAC enables the JDA1 to support multiple audio sample rates from a single 27MHz input clock frequency. This eliminates the expense of audio clock generation circuitry normally required for MPEG, Dolby Digital®, MP3, AAC and other multi-sample-rate applications. In applications incorporating MPEG video, the 27 MHz clock frequency can be shared with the STC and video encoder clocks, further reducing cost.
The JDA1 employs all digital PLL circuitry in a novel architecture such that the output oversampling rate is constant over all of the audio sample rates. This results in a constant delta-sigma noise spectrum that can be efficiently filtered regardless of sample rate. Thus the JDA1 provides better performance than traditional designs that simply use a PLL to generate a DAC master clock that is a multiple of the audio sample rate, and thus have noise spectrums that change with sample rate. The JDA1 accepts digital PCM inputs from 16 to 24 bits wide at standard sample rates 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, and 48kHz. Customized sample rates are also available and 96kHz/24-bit operation is possible as well. The JDA1 is ideal for many applications ranging from digital set-top boxes to MP3 players.
The J5 is a core cell design of an application specific signal processor which performs both TruSurround(TM) and SRS® 3D audio virtualization processing in a single design. The 3-D processing allows users to enjoy benefits of a multi-channel sound source with only two reproduction channels. For Dolby Digital® (AC-3) sources, the J5 accepts full 6-channel PCM inputs and performs the 3-D processing to produce output Left/Right signals. Similarly, for decoded ProLogic(TM) sources, the J5 accepts a 4-channel PCM input (L,C,R,S) and produces the same stereo output. When played through a conventional stereo sound system the user experiences virtualized multi-channel sound, as if the reproduction system was playing all 4 or 6 channels. In SRS 3D mode, the J5 accepts a stereo PCM input and implements the SRS Labs 3-D algorithm to further spatialize the signal. The J5 downmixing capability produces stereo output in bypass mode. There is also a simple LR bypass mode which simply passes L/R inputs to the outputs. Of course, muting is also selectable. A passive matrix feature also allows playback of matrix encoded (Lt,Rt) signals with TruSurround processing.
The J5 is a completely digital processor that will fit nicely between and audio decoder such as the J1 and and audio DAC such as the JDA1. It has a 20-bit parallel PCM input and output interface, plus a number of static control inputs. The J5 consists of a single small logic block and a small RAM cell. It is very economical, requiring < 0.16 sqmm of silicon area (based on data from standard 0.18u CMOS standard cell libraries and layouts). J5 operation and performance have been pre-certified by SRS Labs, Inc.
Juan Pineda - Expert in MPEG audio/video/system design. S.B. Massachusetts Institute of Technology, M.S. Brandeis University