JacobsPineda.com

Jacobs Pineda, Inc. licenses VLSI designs for Dolby Digital®, AC-3, MPEG, DVD, DAC, and PLL audio functions. Our focus is on VLSI designs for high volume consumer applications, so our designs are optimized to minimize silicon and system costs.

At Jacobs Pineda, Inc., we use a core cell methodology to deliver our VLSI designs to our customers. This methodology enables VLSI designers to integrate their proprietary designs with designs from Jacobs Pineda, Inc., and thus build highly integrated and portable VLSI circuits with a minimum of design effort and silicon cost. Click here for more information on the core cell methodology.

The J1 is a core cell design for an application-specific signal processor which performs Dolby Digital®, AC-3, and MPEG audio decompression in a single design. The J1 is exceptionally efficient, and requires only 1.0 sqmm of silicon area (based on data from several standard 3LM 0.18u CMOS standard cell libraries and layouts).

The J1 is capable of decoding all Dolby Digital and AC-3 bitstreams with full support for bitstreams encoded with 5.1 channels and data rates of up to 640kb/s. The J1 downmixing capability produces stereo output in either normal or Pro-Logic compatible modes, making it ideal for DVD and set-top applications. For MPEG operation, J1 produces stereo output from either MPEG-1 or MPEG-2 audio bitstreams. It also processes uncompressed PCM inputs to control volume or mix to mono.

The J1 audio quality meets the highest standards, allowing it to be used for the most demanding audio applications. The 20-bit PCM output yields Dolby Group A performance for Dolby Digital/AC-3, and conforms to the highest audio quality level specified by ISO11172-4 for MPEG bitstreams. The J1 Dolby Digital/AC-3 decoding algorithm has undergone testing at Dolby Laboratories and has been qualified for Group A applications.
**The J1 silicon implementation has been granted Dolby Digital Certification by Dolby Laboratories for sales to Dolby Laboratories Licencing Corporation Licensees.**

Click here for more information on J1.

Click here to download a datasheet for the J1.

(requires Adobe Acrobat® Reader)

The JDA1 is core cell design for a high-performance delta-sigma audio D/A converter (DAC) with an integral Phase Lock Loop (PLL) that can be manufactured using off-the-shelf digital processes with off-the-shelf gate array or standard cell libraries. The JDA1 is exceptionally efficient, and requires only 0.3 - 0.4 sqmm of silicon area (based on data from several standard 3LM 0.18u CMOS standard cell libraries and layouts). Size scales with digital IC technology.

The incorporation of a PLL with the DAC enables the JDA1 to support multiple audio sample rates from a single 27MHz input clock frequency. This eliminates the expense of audio clock generation circuitry normally required for MPEG, Dolby Digital®, MP3, AAC and other multi-sample-rate applications. In applications incorporating MPEG video, the 27 MHz clock frequency can be shared with the STC and video encoder clocks, further reducing cost.

The JDA1 employs all digital PLL circuitry in a novel architecture such that the output oversampling rate is constant over all of the audio sample rates. This results in a constant delta-sigma noise spectrum that can be efficiently filtered regardless of sample rate. Thus the JDA1 provides better performance than traditional designs that simply use a PLL to generate a DAC master clock that is a multiple of the audio sample rate, and thus have noise spectrums that change with sample rate. The JDA1 accepts digital PCM inputs from 16 to 24 bits wide
at standard sample rates 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, and 48kHz. Customized sample rates are also available and 96kHz/24-bit
operation is possible as well. The JDA1 is ideal for many applications ranging from digital set-top boxes to MP3 players.

Click here for more information on JDA1.

Click here to download a datasheet for the JDA1.

(requires Adobe Acrobat® Reader)

J5 - 3-D Audio Processor

The J5 is a core cell design of an application specific signal processor which performs both TruSurround(TM) and SRS® 3D audio virtualization processing in a single design. The 3-D processing allows users to enjoy benefits of a multi-channel sound source with only two reproduction channels. For Dolby Digital® (AC-3) sources, the J5 accepts full 6-channel PCM inputs and performs the 3-D processing to produce output Left/Right signals. Similarly, for decoded ProLogic(TM) sources, the J5 accepts a 4-channel PCM input (L,C,R,S) and produces the same stereo output. When played through a conventional stereo sound system the user experiences virtualized multi-channel sound, as if the reproduction system was playing all 4 or 6 channels. In SRS 3D mode, the J5 accepts a stereo PCM input and implements the SRS Labs 3-D algorithm to further spatialize the signal. The J5 downmixing capability produces stereo output in bypass mode. There is also a simple LR bypass mode which simply passes L/R inputs to the outputs. Of course, muting is also selectable. A passive matrix feature also allows playback of matrix encoded (Lt,Rt) signals with TruSurround processing.

The J5 is a completely digital processor that will fit nicely between and audio decoder such as the J1 and and audio DAC such as the JDA1. It has a 20-bit parallel PCM input and output interface, plus a number of static control inputs. The J5 consists of a single small logic block and a small RAM cell. It is very economical, requiring < 0.16 sqmm of silicon area (based on data from standard 0.18u CMOS standard cell libraries and layouts). J5 operation and performance have been pre-certified by SRS Labs, Inc.

Click here for more information about the J5.

Click here to download a datasheet for the J5. (requires Adobe Acrobat® Reader)

AC-1 (Nuance Designworks, Inc.)
For products in the area of Dolby AC-1 encoding and decoding, please see Founder's
Biography section below under Gordon Jacobs or click here.

SRS® and the SRS symbol are registered trademarks of SRS Labs, Inc.
TruSurround(TM) is a trademark of SRS Labs, Inc.
Dolby Digital® is a registered trademarks of Dolby Laboratories, Inc.
Prologic(TM) is a trademark of Dolby Laboratories, Inc.

Jacobs Pineda, Inc. brings together over 40 years of experience of its two founders in the fields of computer, audio, video, and signal processing design.

Juan Pineda - Expert in MPEG audio/video/system design. S.B. Massachusetts Institute of Technology, M.S. Brandeis University

· over 20 years of Experience in CPU design, 3D graphics, and MPEG

· Apple Computer, Apollo Computer, Prime Computer

· President of Logician, Inc.:

Gordon Jacobs - Expert in D/A conversion, Dolby systems, analog/digital filters. Ph.D., M.S.E.E. UC Berkeley, B.S.E.E. University of Illinois Urbana

· over 20 years of experience in: DSP, digital audio, D/A, mixed-signal design

· Pioneered first switched-capacitor ladder filter at U.C. Berkeley

· Silicon Systems, Inc. - First monolithic mixed signal DTMF Receiver

· Dolby Labs - 1979 to 1984:

· U.C. Berkeley - Fully self-timed DSP development (Ph.D. thesis, 1989)

· President: Nuance Design Works, Inc. (1989 - present)

For information on existing Nuance Designworks, Inc. products for Dolby: AC-1 Encoding and Decoding, please contact JPI or visit the Nuance site.



			Welcome to Jacobs Pineda, Inc. Jacobs Pineda, Inc. specializes in VLSI designs for high volume, cost sensitive, consumer audio applications requiring AC-3, MPEG, DVD, DAC, PLL and 3-D functions. Our flagship product is the J1 Dolby Digital®/AC-3/MPEG Audio Decoding Core Cell, which is the world's smallest, with a silicon area of only 1.0 sq.mm(0.18u CMOS). Our mission is to give our licensees a definitive advantage over their competition by providing them with the industry's most cost-effective audio VLSI designs. Our designs are currently licensed and employed by Fortune 500 semiconductor and system manufacturers of audio products for the consumer and computing markets. Founded in 1995, Jacobs Pineda, Inc. is a California Corporation with offices in Oakland, CA. Audio Products Jacobs Pineda, Inc. licenses VLSI designs for Dolby Digital®, AC-3, MPEG, DVD, DAC, and PLL audio functions. Our focus is on VLSI designs for high volume consumer applications, so our designs are optimized to minimize silicon and system costs. At Jacobs Pineda, Inc., we use a core cell methodology to deliver our VLSI designs to our customers. This methodology enables VLSI designers to integrate their proprietary designs with designs from Jacobs Pineda, Inc., and thus build highly integrated and portable VLSI circuits with a minimum of design effort and silicon cost. Click here for more information on the core cell methodology. J1 - Dolby Digital/AC-3/MPEG Audio Decoding Core The J1 is a core cell design for an application-specific signal processor which performs Dolby Digital®, AC-3, and MPEG audio decompression in a single design. The J1 is exceptionally efficient, and requires only 1.0 sqmm of silicon area (based on data from several standard 3LM 0.18u CMOS standard cell libraries and layouts). The J1 is capable of decoding all Dolby Digital and AC-3 bitstreams with full support for bitstreams encoded with 5.1 channels and data rates of up to 640kb/s. The J1 downmixing capability produces stereo output in either normal or Pro-Logic compatible modes, making it ideal for DVD and set-top applications. For MPEG operation, J1 produces stereo output from either MPEG-1 or MPEG-2 audio bitstreams. It also processes uncompressed PCM inputs to control volume or mix to mono. The J1 audio quality meets the highest standards, allowing it to be used for the most demanding audio applications. The 20-bit PCM output yields Dolby Group A performance for Dolby Digital/AC-3, and conforms to the highest audio quality level specified by ISO11172-4 for MPEG bitstreams. The J1 Dolby Digital/AC-3 decoding algorithm has undergone testing at Dolby Laboratories and has been qualified for Group A applications. **The J1 silicon implementation has been granted Dolby Digital Certification by Dolby Laboratories for sales to Dolby Laboratories Licencing Corporation Licensees.** Click here for more information on J1. Click here to download a datasheet for the J1. (requires Adobe Acrobat® Reader) Back to top of Jacobs Pineda Home Page . JDA1 - Multi-rate Audio DAC/PLL Core The JDA1 is core cell design for a high-performance delta-sigma audio D/A converter (DAC) with an integral Phase Lock Loop (PLL) that can be manufactured using off-the-shelf digital processes with off-the-shelf gate array or standard cell libraries. The JDA1 is exceptionally efficient, and requires only 0.3 - 0.4 sqmm of silicon area (based on data from several standard 3LM 0.18u CMOS standard cell libraries and layouts). Size scales with digital IC technology. The incorporation of a PLL with the DAC enables the JDA1 to support multiple audio sample rates from a single 27MHz input clock frequency. This eliminates the expense of audio clock generation circuitry normally required for MPEG, Dolby Digital®, MP3, AAC and other multi-sample-rate applications. In applications incorporating MPEG video, the 27 MHz clock frequency can be shared with the STC and video encoder clocks, further reducing cost. The JDA1 employs all digital PLL circuitry in a novel architecture such that the output oversampling rate is constant over all of the audio sample rates. This results in a constant delta-sigma noise spectrum that can be efficiently filtered regardless of sample rate. Thus the JDA1 provides better performance than traditional designs that simply use a PLL to generate a DAC master clock that is a multiple of the audio sample rate, and thus have noise spectrums that change with sample rate. The JDA1 accepts digital PCM inputs from 16 to 24 bits wide at standard sample rates 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, and 48kHz. Customized sample rates are also available and 96kHz/24-bit operation is possible as well. The JDA1 is ideal for many applications ranging from digital set-top boxes to MP3 players. Click here for more information on JDA1. Click here to download a datasheet for the JDA1. (requires Adobe Acrobat® Reader) Back to top of Jacobs Pineda Home Page J5 - 3-D Audio Processor The J5 is a core cell design of an application specific signal processor which performs both TruSurround(TM) and SRS® 3D audio virtualization processing in a single design. The 3-D processing allows users to enjoy benefits of a multi-channel sound source with only two reproduction channels. For Dolby Digital® (AC-3) sources, the J5 accepts full 6-channel PCM inputs and performs the 3-D processing to produce output Left/Right signals. Similarly, for decoded ProLogic(TM) sources, the J5 accepts a 4-channel PCM input (L,C,R,S) and produces the same stereo output. When played through a conventional stereo sound system the user experiences virtualized multi-channel sound, as if the reproduction system was playing all 4 or 6 channels. In SRS 3D mode, the J5 accepts a stereo PCM input and implements the SRS Labs 3-D algorithm to further spatialize the signal. The J5 downmixing capability produces stereo output in bypass mode. There is also a simple LR bypass mode which simply passes L/R inputs to the outputs. Of course, muting is also selectable. A passive matrix feature also allows playback of matrix encoded (Lt,Rt) signals with TruSurround processing. The J5 is a completely digital processor that will fit nicely between and audio decoder such as the J1 and and audio DAC such as the JDA1. It has a 20-bit parallel PCM input and output interface, plus a number of static control inputs. The J5 consists of a single small logic block and a small RAM cell. It is very economical, requiring < 0.16 sqmm of silicon area (based on data from standard 0.18u CMOS standard cell libraries and layouts). J5 operation and performance have been pre-certified by SRS Labs, Inc. Click here for more information about the J5. Click here to download a datasheet for the J5. (requires Adobe Acrobat® Reader) Back to top of Jacobs Pineda Home Page AC-1 (Nuance Designworks, Inc.) For products in the area of Dolby AC-1 encoding and decoding, please see Founder's Biography section below under Gordon Jacobs or click here. SRS® and the SRS symbol are registered trademarks of SRS Labs, Inc. TruSurround(TM) is a trademark of SRS Labs, Inc. Dolby Digital® is a registered trademarks of Dolby Laboratories, Inc. Prologic(TM) is a trademark of Dolby Laboratories, Inc. Founders Biographies Jacobs Pineda, Inc. brings together over 40 years of experience of its two founders in the fields of computer, audio, video, and signal processing design. Juan Pineda - Expert in MPEG audio/video/system design. S.B. Massachusetts Institute of Technology, M.S. Brandeis University · over 20 years of Experience in CPU design, 3D graphics, and MPEG · Apple Computer, Apollo Computer, Prime Computer · President of Logician, Inc.: ANSI X3L3, WG11 (MPEG) member since 1990 Product: core cell for MPEG-2 audio decoding Custom: Apple PowerBook 540 I/O subsystem and modem ASICs Custom: Architect of Hyundai Electronics A/V/S MPEG decoder. · Contributor to MPEG international standard since 1990: Editor of MPEG-1 System Specification MPEG1 system, synchronization, buffer management Layer 3 audio simulation software. Draft of specification. Gordon Jacobs - Expert in D/A conversion, Dolby systems, analog/digital filters. Ph.D., M.S.E.E. UC Berkeley, B.S.E.E. University of Illinois Urbana · over 20 years of experience in: DSP, digital audio, D/A, mixed-signal design · Pioneered first switched-capacitor ladder filter at U.C. Berkeley · Silicon Systems, Inc. - First monolithic mixed signal DTMF Receiver · Dolby Labs - 1979 to 1984: Design of professional audio products. Participated in early work on digital audio coding (AC-1). · U.C. Berkeley - Fully self-timed DSP development (Ph.D. thesis, 1989) · President: Nuance Design Works, Inc. (1989 - present) Product: core cell for Delta-Sigma D/A conversion Product: core cell for AC-1 decoding Product: General Purpose Software and DSP-based AC-1 Encoder Encoder Design study and analysis of AC-2 decoder silicon. For information on existing Nuance Designworks, Inc. products for Dolby AC-1 Encoding and Decoding, please contact JPI or visit the Nuance site. How to Contact Us Corporate Headquarters Jacobs Pineda, Inc. 6280 Acacia Ave. Oakland, CA 94618 +1.415.641.9194 http://www.jacobspineda.com For product inquiries, etc. via the internet, please use our: Web Contact Form or contact us at Back to top of Jacobs Pineda Home Page Links to Other Sites - the inventors of Dolby Digital®/AC-3. - Tristan's MPEG resource page. - SRS Labs Page for TruSurround/ SRS 3-D® and other Audio products. - top-notch ASIC Synthesis tools, and now keepers of the VCS Verilog Simulator. - get the Adobe Acrobat Reader for viewing PDF datasheets. (Click here) SUN Microsystems - JPI Deliverables are supported under SUN Solaris 6,7,8 and Linux Back to top of Jacobs Pineda Home Page --- ©1997-2008 Jacobs Pineda, Inc. This site or any of its content may not* be used in any form without the expressed written permission of Jacobs Pineda, Inc.*