Welcome to Jacobs Pineda, Inc.
Jacobs Pineda, Inc. specializes in VLSI designs for high volume, cost sensitive, consumer audio applications requiring AC-3, MPEG, DVD, DAC, PLL and 3-D functions. Our flagship product is the J1 Dolby Digital®/AC-3/MPEG Audio Decoding Core Cell, which is the world's smallest, with a silicon area of only 1.0 sq.mm(0.18u CMOS). Our mission is to give our licensees a definitive advantage over their competition by providing them with the industry's most cost-effective audio VLSI designs. Our designs are currently licensed and employed by Fortune 500 semiconductor and system manufacturers of audio products for the consumer and computing markets.
Founded in 1995, Jacobs Pineda, Inc. is a California Corporation with offices in Oakland, CA.
Jacobs Pineda, Inc. licenses VLSI designs for Dolby Digital®, AC-3, MPEG, DVD, DAC, and PLL audio functions. Our focus is on VLSI designs for high volume consumer applications, so our designs are optimized to minimize silicon and system costs.
At Jacobs Pineda, Inc., we use a core cell methodology to deliver our VLSI designs to our customers. This methodology enables VLSI designers to integrate their proprietary designs with designs from Jacobs Pineda, Inc., and thus build highly integrated and portable VLSI circuits with a minimum of design effort and silicon cost. Click here for more information on the core cell methodology.
The J1 is a core cell design for an application-specific signal processor which performs Dolby Digital®, AC-3, and MPEG audio decompression in a single design. The J1 is exceptionally efficient, and requires only 1.0 sqmm of silicon area (based on data from several standard 3LM 0.18u CMOS standard cell libraries and layouts).
The J1 is capable of decoding all Dolby Digital and AC-3 bitstreams with full support for bitstreams encoded with 5.1 channels and data rates of up to 640kb/s. The J1 downmixing capability produces stereo output in either normal or Pro-Logic compatible modes, making it ideal for DVD and set-top applications. For MPEG operation, J1 produces stereo output from either MPEG-1 or MPEG-2 audio bitstreams. It also processes uncompressed PCM inputs to control volume or mix to mono.
The J1 audio quality meets the highest standards, allowing
it to be used for the most demanding audio applications. The 20-bit
PCM output yields Dolby Group A performance for Dolby Digital/AC-3,
and conforms to the highest audio quality level specified by ISO11172-4
for MPEG bitstreams. The J1 Dolby Digital/AC-3 decoding algorithm has
undergone testing at Dolby Laboratories and has been qualified for Group
The JDA1 is core cell design for a high-performance delta-sigma audio D/A converter (DAC) with an integral Phase Lock Loop (PLL) that can be manufactured using off-the-shelf digital processes with off-the-shelf gate array or standard cell libraries. The JDA1 is exceptionally efficient, and requires only 0.3 - 0.4 sqmm of silicon area (based on data from several standard 3LM 0.18u CMOS standard cell libraries and layouts). Size scales with digital IC technology.
The incorporation of a PLL with the DAC enables the JDA1 to support multiple audio sample rates from a single 27MHz input clock frequency. This eliminates the expense of audio clock generation circuitry normally required for MPEG, Dolby Digital®, MP3, AAC and other multi-sample-rate applications. In applications incorporating MPEG video, the 27 MHz clock frequency can be shared with the STC and video encoder clocks, further reducing cost.
The JDA1 employs all digital PLL circuitry in a novel
architecture such that the output oversampling rate is constant over
all of the audio sample rates. This results in a constant delta-sigma
noise spectrum that can be efficiently filtered regardless of sample
rate. Thus the JDA1 provides better performance than traditional designs
that simply use a PLL to generate a DAC master clock that is a multiple
of the audio sample rate, and thus have noise spectrums that change
with sample rate. The JDA1 accepts digital PCM inputs from 16
to 24 bits wide
- 3-D Audio Processor
The J5 is a completely digital processor that will fit
nicely between and audio decoder such as the J1 and and audio DAC
as the JDA1. It has a 20-bit parallel PCM input and output interface,
plus a number of static control inputs. The J5 consists of a
single small logic block and a small RAM cell. It is very economical,
requiring < 0.16 sqmm of silicon area (based on data from
standard 0.18u CMOS standard cell libraries and layouts).
J5 operation and performance have been pre-certified by SRS Labs, Inc.
(Nuance Designworks, Inc.)
SRS® and the SRS symbol are registered trademarks
of SRS Labs, Inc.
Jacobs Pineda, Inc. brings together over 40 years of experience of its two founders in the fields of computer, audio, video, and signal processing design.
Juan Pineda - Expert in MPEG audio/video/system design. S.B. Massachusetts Institute of Technology, M.S. Brandeis University
Gordon Jacobs - Expert in D/A conversion, Dolby systems, analog/digital filters. Ph.D., M.S.E.E. UC Berkeley, B.S.E.E. University of Illinois Urbana
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SUN Microsystems - JPI Deliverables are supported under SUN Solaris 6,7,8 and Linux
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